ziss_dm wrote:Hi,
Updated to "V 2.0.4 alpha":
ziss_dm
Hi, ziss_dm,
Thanks for your work. I just tested the latest sources, again with bs20_nFet/KDA20-28m and bs12a_nFet/kda20-50s. Again fine on the bench, first flight will be tomorrow if the weather is fine.
Question:
ziss_dm wrote:- Complementary PWM support for all-n-fet boards.ziss_dm
Can I activate this by
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//*************************
// System settings *
//*************************
//#define OSC_DEBUG
#define COMP_PWM
braking directly in the setup section of wii_esc_ng.cpp? :
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pwr_stage.braking_enabled = 1;
I modded the HAL for bs_nfet for reversed rotation, maybe helpful for someone else, maybe I just missed the "reverse-flag" somewhere else in the code
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#ifndef _BS_NFET_REV_H_
#define _BS_NFET_REV_H_
//*********************
// PORT B definitions *
//*********************
#define DbgLED 5
#define DbgStr 4
#define CnFET 0
#define PORTB_INIT 0
#define PORTB_DD (1<<CnFET)+(1<<DbgLED)+(1<<DbgStr)
#define BRAKE_PB (1<<CnFET)
inline void DebugLEDOn() {PORTB |= _BV(DbgLED);}
inline void DebugLEDOff() {PORTB &= ~_BV(DbgLED);}
inline void DebugLEDToggle() {PORTB ^= _BV(DbgLED);}
inline void DebugStrOn() {PORTB |= _BV(DbgStr);}
inline void DebugStrOff() {PORTB &= ~_BV(DbgStr);}
inline void DebugStrToggle() {PORTB ^= _BV(DbgStr);}
//*********************
// PORT C definitions *
//*********************
#define AnRef 1
#define CpFET 3
/* swap A/B
#define BnFET 4
#define BpFET 5
#define PORTC_INIT (1<<AnRef)+(1<<CpFET)+(1<<BpFET)
#define PORTC_DD (1<<AnRef)+(1<<CpFET)+(1<<BnFET)+(1<<BpFET)
#define BRAKE_PC (1<<BnFET)
*/
#define AnFET 4
#define ApFET 5
#define PORTC_INIT (1<<AnRef)+(1<<CpFET)+(1<<ApFET)
#define PORTC_DD (1<<AnRef)+(1<<CpFET)+(1<<AnFET)+(1<<ApFET)
#define BRAKE_PC (1<<AnFET)
//*********************
// PORT D definitions *
//*********************
#define rcp_in 2
#define c_comp 6
/* swap A/B
#define AnFET 5
#define ApFET 4
#define PORTD_INIT (1<<ApFET)
#define PORTD_DD (1<<ApFET)+(1<<AnFET)
#define BRAKE_PD (1<<AnFET)
*/
#define BnFET 5
#define BpFET 4
#define PORTD_INIT (1<<BpFET)
#define PORTD_DD (1<<BpFET)+(1<<BnFET)
#define BRAKE_PD (1<<BnFET)
/*inline void ApFETOn() {PORTD &= ~_BV(ApFET);}
inline void ApFETOff() {PORTD |= _BV(ApFET);}
inline void AnFETOn() {PORTD |= _BV(AnFET);}
inline void AnFETOff() {PORTD &= ~_BV(AnFET);}
inline void BpFETOn() {PORTC &= ~_BV(BpFET);}
inline void BpFETOff() {PORTC |= _BV(BpFET);}
inline void BnFETOn() {PORTC |= _BV(BnFET);}
inline void BnFETOff() {PORTC &= ~_BV(BnFET);}
*/
inline void ApFETOn() {PORTC &= ~_BV(ApFET);}
inline void ApFETOff() {PORTC |= _BV(ApFET);}
inline void AnFETOn() {PORTC |= _BV(AnFET);}
inline void AnFETOff() {PORTC &= ~_BV(AnFET);}
inline void BpFETOn() {PORTD &= ~_BV(BpFET);}
inline void BpFETOff() {PORTD |= _BV(BpFET);}
inline void BnFETOn() {PORTD |= _BV(BnFET);}
inline void BnFETOff() {PORTD &= ~_BV(BnFET);}
inline void CpFETOn() {PORTC &= ~_BV(CpFET);}
inline void CpFETOff() {PORTC |= _BV(CpFET);}
inline void CnFETOn() {PORTB |= _BV(CnFET);}
inline void CnFETOff() {PORTB &= ~_BV(CnFET);}
#define mux_c 0
//#define mux_a 6
//#define mux_b 7
#define mux_b 6
#define mux_a 7
inline void ACInit() {
ACMultiplexed();
ACSR |= _BV(ACIC);
}
inline void ACPhaseA() {
ACChannel(mux_a);
}
inline void ACPhaseB() {
ACChannel(mux_b);
}
inline void ACPhaseC() {
ACChannel(mux_c);
};
//#define BEMF_FILTER_DELAY_US 22
void Board_Idle() {
};
inline void Board_Init() {
TIMSK = 0;
// Timer1
TCCR1A = 0;
TCCR1B = _BV(CS11); /* div 8 clock prescaler */
PORTB = PORTB_INIT; DDRB = PORTB_DD;
PORTC = PORTC_INIT; DDRC = PORTC_DD;
PORTD = PORTD_INIT; DDRD = PORTD_DD;
ACInit();
}
#endif // _BS_NFET_REV_H_
Regards,
gompf